J'ai postulé en ligne. J'ai passé un entretien chez Apple (Austin, TX) en mars 2019
Entretien
One technical phone interview - 45mins to one hour. - HR got back pretty quick with 2-3 days
On site interview - 6 technical & 1 HR round ( 1 PD, 1 timing, 1 power, 3 RTL rounds - manager interview was RTL related)
Questions d'entretien [1]
Question 1
1)why clock tree has inverters and not buffers?
2) structure of buffer internally
3) swap VDD & GND for inverter - describe the output
4) major elements to consider when building clock tree
5) why insertion delay is important?
6) CRPR
7) skew vs jitter
RTL round
1) always block sensitivity list
2) latch inference
3) basic pipeline stages
4) hazards in pipeline
5) timing feedback to rtl
PD round
1) basic Perl/python code to parse files and print data
2) regexp example
3) timing basics - aocv, pocv
4) how and why derating is done
Manager interview - Resume related
Timing round
1) timing driven restructuring example
2) identifying critical path in the given design
3) reordering of inputs based on criticality
4) how does transition affect cell delay
5) how can we vary transition to change setup and hold time
Power round
1) multi VDD design basics
2) power gating
3) structure of level shifter
4) IR drop and EM problems
6) antenna violation
7) leakage power and it’s components
RTL round 2
1) showed 2 timing paths and asked to identify the issues in the path
2) write an algorithm to store elements in a memory
3) reg array vs reg latch
3 rounds of tech interviews, Not hard. People are friendly, and not harsh at all. Sometimes, they even walk through the thinking process. But one should still be prepared to answer questions related to architecture.
Questions d'entretien [1]
Question 1
What's the difference between a register and a small piece of memory
J'ai postulé via la recommandation d'un employé. Le processus a pris 4 semaines. J'ai passé un entretien chez Apple
Entretien
1 round of phone interview followed by onsite interview which split into 4 interviewers each day for two days. Overall 9 interview. Each of them covered different topics and interview was challenging.
Questions d'entretien [1]
Question 1
Explain Tomasulo completely,
SRAM design, cmos gate optimization, tools and constraints, semiconductor device characteristics, process corners etc were the topics covered