J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 5 jours. J'ai passé un entretien chez Qualcomm (Vellore) en sept. 2022
Entretien
Qualcomm had come to my University for two roles - Hardware and Software. I applied for Hardware Role. There was one round of online test and 2 interview rounds.
The first round - online test - consisted of 3 sections with 20 questions in each section and 30 mins per section. You can travel through the questions in a particular section. The marking scheme was +1 for correct answer and -0.25 for wrong answer.
The second round was a technical interview and it went on for around 50 mins. It was conducted online on Microsoft Teams. The interview covered quite a lot of topics mainly related to CMOS, Digital Electronics and Verilog.
The third round was also a technical interview primarily, except a few discussions about location preferences. This again was conducted online on Microsoft Teams, the same day as the first interview. It lasted for about 35-40 mins.
After the second interview round, there was no further HR round for any of the applicants. The same day, we received the final results of the process and in total 8 people were selected for Internship + Full time offer. Out of these, 4 were for Hardware and 4 were for Software.
Questions d'entretien [1]
Question 1
Round 1 -
• Section 1 – Aptitude and Logical reasoning questions with some basic math.
• Section 2 – C language based coding MCQs including pointers, arrays, and etc. and general number system questions.
• Section 3 – Digital Electronics section with questions from Combinational and Sequential circuits, Boolean algebra, CMOS, BJT, ADC and DAC, etc.
Round 2 -
• A few questions about my resume.
• Draw transfer characteristics of inverter.
• What is the threshold voltage of an inverter?
• What is high and low Noise margin? What does it signify
• Draw CMOS inverter and mark all 4 terminals.
• Draw a physical diagram of an NMOS.
• What happens if the body is not shorted to source? What might happen if it is connected to a higher voltage than source?
• What are state machines?
• Write the Verilog code for a mod-3 counter.
• What are the common mistakes one can make while writing this Verilog code?
• How would you make an AND gate with a 2x1 MUX?
• How would you make an OR gate with an XOR gate?
Round 3 -
• Asked a few general personal questions about me and resume.
• A logical aptitude based question – If you have 2 cubes with 6 surfaces each, how will you any day of a month from 01 to 31 using the 2 cubes by writing any single digit number on each side of both the cube?
• Implement an OR gate using NAND gates.
• Draw an OR gate using a 2x1 MUX.
• What is the equation of an EXOR gate?
• Draw a NAND gate using CMOS logic.
• Explain how it functions.
• What is setup time and hold time?
• What are the different types of Finite state machines? What is the difference?
• Draw the state diagram of a sequence detector to detect - 01*0010*1 - where 1* means that 1 can be repeated any number of times and similarly 0*.
• Verbally explain how you would write a Verilog code for a finite state machine.
• Discussions regarding job location.
It was on campus hiring. It consists of an online assessment and resume screening, followed by 3 rounds of interviews, out of which 2 were technical and 1 was HR.
J'ai postulé via un recruteur. J'ai passé un entretien chez Qualcomm (Hsinchu)
Entretien
The interview process spanned 4 days with one 1–2 hour session per day. Each round began with a 30-minute discussion on my college projects, followed by deep dives into Computer Architecture (CPU Design, Cache DDesign, etc.). One of the sessions also included a simple whiteboard coding question.
Questions d'entretien [1]
Question 1
Cache Design (calculating cache bits involves breaking down the CPU address into Tag, Index, and Offset field)
The interviewer was friendly and created a supportive atmosphere. They offered constructive hints when I got stuck, showing they were focused on my thought process, which made for a positive experience.
Questions d'entretien [1]
Question 1
They asked questions on STA,my projects, Verilog case statements