it was 3round interview ,intial round was mostly about project and basic questions about applications and implementation of project using other methods and methods used in it,some basic questions about fpga,encoders and decoders,,2nd round complete digital and sta basics along with project,3rd round cmos basics and area of interest what you have studied and strong at
Questions d'entretien [1]
Question 1
setup and holdtime
latch and flipflop
few questions about why you choose your project
J'ai passé un entretien chez Intel Corporation (Petah Tikva)
Entretien
very nice people. given 2 question one on system of the group and one for coding in binary search and recursion. we started by little talking and then a little bit on one of the project and then 2 questions
Questions d'entretien [1]
Question 1
1. given graph and car with light sensor and we want to find the right spot of the dot on the graph. it was binary search classical
J'ai postulé en ligne. J'ai passé un entretien chez Intel Corporation (Bengaluru) en mai 2026
Entretien
Deep whiteboard interview , was asked to draw graphs for non ideal characteristics for cmos design and pvt corners. Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Questions d'entretien [1]
Question 1
was asked to draw graphs for non ideal characteristics for cmos design and pvt corners.Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
J'ai passé un entretien chez Intel Corporation (Austin, TX)
Entretien
This was the second round lasted about an hour or so. The first round was mostly about my work as I had 3 year experience and I had to walk them through the projects I did etc..,.
Questions d'entretien [1]
Question 1
If the combination logic between 2 FF's is cut like an interface, how do you set_input_delay and set_output_delay for left and right partitions. The clock is the same for both.