There were two rounds, one in each week. In first round, was asked about projects, questions on related topics like UVM, System verilog, Coverage. Other questions were on logic design, C++, verilog, computer architecture like virtual memory. In second round, interview was taken by team lead and asked questions about projects (in detail), puzzle question and design question on priority encoder.

I had 1 hour of Phone interview for the pre silicon verification. The person who interviewed me was a nice and very experienced person. He was more into RTL coding. He asked me completely on Computer Architecture subject. Like Pipelinig, Hazards of it, Cache memories, Virtual Memories. Also he asked me how much of VHDL I knew and when was it used last. One Digital logic question (Pretty easy one) This was for a Recent College Graduate position. Good luck!