J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Cypress Semiconductor (Pilani) en sept. 2015
Entretien
This is regarding the campus placements interview. There were three technical rounds of one on one interview, followed by a HR wolf-pack round, with few brief and general technical questions.
Questions d'entretien [1]
Question 1
Regarding verification profile, I was about why verification was needed, what is the basic flow, few basic questions in System Verilog, few basic verification concepts such as coverage, randomization, etc. Another round of interview comprised of basic questions on digital logic, such as design of different types of counters, their pros and cons, what is a glitch, setup-and-hole time, etc
J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 1 jour. J'ai passé un entretien chez Cypress Semiconductor (Ahmedabad) en juil. 2018
Entretien
They started with simple questions about your life to make you comfortable. They focused on your confidence, pressure handling capacity, how you greet them and majorly your basic subject concepts rather than deep knowledge about a single toic.
Questions d'entretien [1]
Question 1
They asked about control systems - damping coefficient, opamp based tough questions, very easy mux and counter based questions, RLC circuit problems
J'ai postulé en ligne. J'ai passé un entretien chez Cypress Semiconductor (Seattle, WA)
Entretien
Typical Online application process:
Online application followed by 1 day On -Site Interview which include 5 one on one interviews ,1 panel interview and 1 presentation.IT was a new grad position for Design Verification position.
Questions d'entretien [1]
Question 1
Questions on Digital Design (CDC and FIFO) , LOGIB DESIGN
Questions of Functional Verification - System Verilog /Verilog/UVM/Verification philosophy
Questions on C and perl/python basics
Questions on Basic Electrical concepts from micro-controllers basic blocks to some basic RC cricuits ,ASIC flow
Questions on projects
J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Cypress Semiconductor (Bengaluru) en sept. 2015
Entretien
Campus Hiring: Got placed in the College during the 3 rd Semester of the MTECH in microelectronics. Cypress had criteria of 8.0 for the process, It was a day long placement process. Presentation followed by the written test and then shortlisted for the interview process. Around 4 interview rounds were scheduled to get the final job offer.