I'd applied online for the position and got a call after 2 months. There was a two hour phone screen by two senior design engineers which consisted of basic digital VLSI questions like logical effort, impact of scaling, types of power, crosstalk issues and some basic questions on number system conversions. A week later, I was invited for an onsite interview at Austin which consisted of 7 rounds of 1:1 interview including an HR round. I felt the interviews covered almost all the aspects of ASIC design flow ranging from RTL coding to layout. Overall, the questions were mostly basic stuffs from timing(setup/hold), verilog coding, IR drop issues, clock tree synthesis, placement, routing etc.